The fabricating of ultra-large-scale integrated (ULSI) circuits has a trend of shrinking the size of the circuits. The semiconductor devices that are fabricated on semiconductor substrates have more small size, the cost for manufacturing the devices is more lower. Thus, how to shrink the size of integrated circuits has become an important issue in the semiconductor process.
As the linewidth of integrated circuits is smaller than one-half micron meters or even smaller than one-quarter micron meters, the thermal conductivity of the intermetal dielectric layers in integrated circuits must be good enough for the reliability of the integrated circuits.
For the high-speed operation of the semiconductor devices on semiconductor substrate, the resistance-capacitance (RC) time delay value of the device must be small enough. Thus, a low dielectric-constant (k) material is preferred for interlayer dielectric layers or intermetal dielectric layers of integrated circuits to reduce the capacitance value of the integrated circuits for high-speed operation. Nevertheless, the low-k dielectric material is organic material and it has a poor thermal conductive ability for integrated circuits.
As the operation speed of integrated circuits is increased, the metal interconnection lines is heated. Thus, high-speed integrated circuits need good thermal-conductivity dielectric material as interlayer dielectric layers or intermetal dielectric layers of the integrated circuits for normal operation.
Referring to FIG. 1, it demonstrates a cross-section view of an integrated circuit formed on a substrate. A first metal pattern 130 is formed on an interlayer dielectric layer 110 and it communicates with the integrated circuit by metal plug 120. Besides, a barrier layer 115 is formed between the metal plug 120 and the interlayer dielectric layer 110 for adhesion and forming an ohmic contact. Moreover, a second metal pattern 180 is formed on a cap layer 160 on an intermetal dielectric layer 150 and it connects to the first metal pattern 130 by using metal plugs 170 in the intermetal dielectric layer 150. Furthermore, a barrier layer 165 is formed underneath the metal plugs 170 for adhesion.
The metal interconnection structure, which is shown in FIG. 1, is a conventional structure used in ULSI circuits. The thermal dissipation of the metal interconnection lines in the integrated circuits is implemented by dielectric layers between the metal interconnection lines and heat is conducted from a top metal pattern of the circuit to a first metal pattern 130, finally, to the substrate 100. If the dielectric layer in integrated circuits has no good thermal conductive ability, the thermal dissipation of the integrated circuits will be hardly reached.
According to the above discussion, normal organic low dielectric-constant material can not provide good thermal conductivity for integrated circuits. It is needed a metal interconnection structure of integrated circuits in order to enhance the thermal dissipation of integrated circuits during the normal operation of the circuits.